Resume

• 2010

  Silicon Integration Initiative

  Inc.

  Silicon Integration Initiative

  Inc.

  University of Oxford

  Oxford

  United Kingdom

  Visiting Scholar

  NC State University

• 2008

  The Low Power Coalition (LPC) of Si2 is responsible for the development of standards and enabling materials to support low power design by taking a flow-centric view from ESL to GDSII. It has defined and published 3 versions of the Common Power Format (CPF Specs) standard - v1.0 in March

  v1.1 in September

  and CPF 2.0

  published in February 2011 (CPF Specs) - that allows a designer to express power constraints and semantics in a clear and concise manner. The LPC has published a power-aware reference flow that is recommended to the industry

  including the identification of power closure points and other related information available throughout the flow

  from Electronic System Level (ESL) through detailed implementation (Power Aware Closure Flow). This flow was used to define the High Level Power Modeling Requirements Documents version 1.0 and 1.1 (downloads). The power modeling requirements have been proposed to the Liberty Technical Advisory Board (LTAB) as enhancements to aid in power modeling structures. Work continues to extend CPF into the systems level for the next release and the power modeling work moves forward to support systems level power characterization and analysis. The Low Power Coalition has also published Parsers

  Pocket Guides(CPF 1.0

  CPF 1.1)

  Interoperability Guidelines for CPF 1.1 and CPF 2.0 and many other helpful documents for Low Power design. Please contact Bob Carver for more information about joining the Low Power Coalition. \n\nThe Low Power Coalition has also published Parsers

  Pocket Guides(CPF 1.0

  CPF 1.1)

  Interoperability Guidelines for CPF 1.1 and CPF 2.0 and many other helpful documents for Low Power design.

  Sotiris Bantas

  Gene P Matter

  Sylvian Kaiser

  Ghislain Kaiser

  John Biggs

  Qi Wang

  Aparna Dey

  Davis

  University of Oxford

  NC State University

• 1995

  Ph.D.

  Electrical Engineering

• 1990

  German

  BS

  Electrical and Computer Engineering

• Matlab

  Cadence Virtuoso

  Simulations

  VLSI

  ASIC

  Static Timing Analysis

  Verilog

  VHDL

  Computer Architecture

  Integrated Circuit Design

  Simulink

  C

  ModelSim

  Junction-level thermal analysis of 3-D integrated circuits using high definition power blurring

  M.B. Steer

  Junction-level thermal analysis of 3-D integrated circuits using high definition power blurring