Sina Meraji

 Sina Meraji

Sina Meraji

  • Courses4
  • Reviews11

Biography

University of Toronto St. George Campus - Computer Science


Resume

  • 2017

    Daisy Intelligence Corporation

    University of Toronto

    IBM Canada Ltd.

    McGill University

    IBM

    Toronto

    Canada Area

    Lead Engineer

    Cloud Innovation lab

    IBM

    Toronto

    Canada Area

    Lead Engineer (IBM Canada Ltd.

    Hardware Acceleration Lab

    Toronto) \n\n\tDesign and development of hardware accelerated systems \n\tIntegration of GPUs to IBM DB2-BLU database\n\tFast query processing for costly database operations (Groupby

    join

    sort) on Power8 processors and Nvidia GPUs \n\tHybrid software/hardware algorithms to increase performance on heterogeneous systems (GPU+CPU)\n\n\nIBM Liquid Metal project\n\tDesign and implementation of high performance drivers for liquid metal project\n\tDesign and implementation of fast I/O library for running lime Programs(java based language) on Corsa4 and corsa5 FPGAs\n\tI/O and drivers give lime programs the ability to run synchronously and asynchronously on FPGA\n\tUsing POSIX multi-threading for high speed Asynchronous communication with FPGA\n\nOpenCL Evaluation\n\tPerformance evaluation of Altera’s OpenCL compiler\n\tComparing the performance of OpenCL kernels on GPU

    FPGA and multi-cores

    Engineer at IBM Hardware Acceleration Lab

    IBM Canada Ltd.

    Toronto

    Canada Area

    Parallel CAD\nTransactional Memories\nMulti-cores\nParallel Game Servers\nInstructor of operating Systems at UOT/Scarborough

    Postdoctoral Researcher & Sessional Lecturer

    University of Toronto

    Toronto

    Canada Area

    Sessional Lecturer

    University of Toronto

    . Project lead and architect - VXTW Project at McGill University\n· Designed and implemented a parallel simulator for digital logic simulation.\n · Designed and implemented load balancing algorithms to balance the load during the simulation.\n · Applied Reinforcement Learning techniques to improve the performance of the load balancing.\n · Implemented an optimistic concurrency control between processors.\n · The system was implemented by C++.\n · Message Passing Interface (MPI) utilized for the communication between the processors.

    McGill University

    Toronto

    Canada Area

    Director

    Machine Learning and Software Development

    Daisy Intelligence Corporation

  • 2007

    PHD

    Thesis: "Applying parallel Processing and Learning Techniques to Optimize Logical Simulation"

    Computer Science

    Parallel Processing

    \nSimulation and Modelling\nTesting verification\nLeaning

  • 2004

    Master of Science

    Thesis: "Routing Algorithms for Necklace-Hypercube Interconnection Network"

    Computer Engineering

    Computer Networks\nSimulation\nHigh Performance Computing

  • 2000

    Bachelor of Science

    Computer Engineering; Hardware Engineering

    AmirKabir University of Technology

    Bachelor of Science

    Industrial Engineering; Project Management

    AmirKabir University of Technology

  • Machine Learning

    C++

    Software Engineering

    Computer Science

    Linux

    Java

    Programming

    Research

    Operating Systems

    LaTeX

    Distributed Systems

    Algorithms

    C

    Software Development

    High Performance Computing

    C#

    Simulations

    Matlab

    Python

    Optimization

    XMulator: A Listener-Based Integrated Simulation Platform for Interconnection Networks

    Hamid Sarbazi-azad

    A flexible

    easy to extend

    fully object-oriented

    and multilayered simulator for interconnection networks can provide researchers with a great assistant. It is so desirable to attach newly designed components to the current models and to exploit detailed results.\nThis paper presents Xmulator

    an object–oriented listener-based simulation environment for evaluating multicomputer networks. The simulator involves a toolbox of various network topologies

    routing-switching algorithms

    and flexible router models. These router models can vary from complex theoretical architectures to simple real devices. This work introduces a simulator based on listener-based integration which has a great impact on extensibility of the system. Mixed-mode event processing

    improves the performance of the simulator. By decoupling individual parts of the code

    Xmulator enables independent code development and creates a flexible and extensible environment for different aspects of network design. This simulator extensively uses XML format for defining topologies

    parameters

    and outputs which leads to more level of flexibility. To the best of the author’s knowledge that is the first simulator that is able to simulate any arbitrary topology in presence of faults.

    XMulator: A Listener-Based Integrated Simulation Platform for Interconnection Networks

    Sina

    Meraji

    University of Toronto

CSC 343

2.3(6)

CSC 369

1.5(2)