Mehran Kermani

 MehranM. Kermani

Mehran M. Kermani

  • Courses7
  • Reviews17

Biography

Mehran Mozaffari Kermani is a/an Assistant Professor in the University Of South Florida department at University Of South Florida

Rochester Institute of Technology - Electrical Engineering


Resume

  • 2012

    Postdoctorate

    Cryptography and Security

    Princeton University

  • 2007

    Ph.D.

    Performing research in the Very-large-scale integration (VLSI) laboratory in the area of cryptographic hardware and embedded systems and reliable VLSI digital designs.\n\nThesis title: Reliable and High-Performance Hardware Architectures for the Advanced Encryption Standard/Galois Counter Mode.

    Electrical and Computer Engineering

    The University of Western Ontario

  • 2005

    Master's

    Thesis title: Fault Detection Schemes for High Performance VLSI Implementations of the Advanced Encryption Standard.

    Electrical and Computer Engineering

    The University of Western Ontario

  • Signal Processing

    Algorithms

    Hardware

    VLSI

    Digital Electronics

    ASIC

    Logic Synthesis

    Embedded Systems

    Hardware Architecture

    Digital Signal Processors

    Python

    Formal Verification

    Image Processing

    Logic Design

    Static Timing Analysis

    Matlab

    Simulations

    High Performance Computing

    LaTeX

    FPGA

    Full publication list:

    Full publication list:

    Published articles on DBLP:

    Published articles on DBLP:

    Mozaffari Kermani

    Mehran

    Mozaffari Kermani

    University of South Florida

    AMD

    Rochester Institute of Technology

    University of Western Ontario

    Princeton University

    Tampa

    Florida

    Assistant Professor

    University of South Florida

    Rochester Area

    New York

    Research includes emerging areas in security

    cryptographic engineering

    side channel analysis attacks

    VLSI reliability

    ASIC and FPGA secure design

    and embedded systems security and privacy.

    Assistant Professor

    Rochester Institute of Technology

    Princeton

    NJ

    Postdoctoral Research Fellow

    Princeton University

    Tutorial and lab Teachng Assistant for graduate and undergraduate courses (15 times).

    University of Western Ontario

    Cryptographic Hardware (ASIC/FPGA) Research Assistant

    Performing research on cryptographic and authentication hardware and its reliability. Performance benchmarking on ASIC and FPGA hardware platforms.

    University of Western Ontario

    Senior ASIC/Layout Design Engineer

    Part of a team integrating sophisticated cyptography/security and video capabilities into a single Fusion processor. Performing advanced RTL and logic design

    leading-edge synthesis

    static timing analysis

    and formal verification.

    AMD

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