Resume

• 2015

  Program Co-Chair

  2015 Int'l Conference on Highly Efficient Accelerators and Reconfigurable Technologies (HEART)

  http://www.eecg.utoronto.ca/asap2015\n

  General Chair

  2015 IEEE Int'l Symposium on Application-specific Systems

  Architectures and Processors (ASAP)

  M. Gort

  J.H. Anderson

  “Design re-use for compile time reduction in FPGA high-level synthesis flows

  ” accepted to appear in the IEEE International Conference on Field-Programmable Technology (FPT)

  Shanghai

  China

  December 2014.

  Early Researcher Award

  Ontario Ministry of Research and Innovation

  Community Award

  For contributions to open-source high-level synthesis.

  2014 Int'l Conference on Field-Programmable Logic and Applications

  Fellow of the Japan Society for the Promotion of Science (JSPS)

  Faculty of Applied Science and Engineering Early Career Teaching Award

  Best Paper Award at ACM FPGA (co-authored with S. Huda and H. Tamura)

  S. Huda

  J.H. Anderson

  H. Tamura

  \"Optimizing effective interconnect capacitance for FPGA power reduction

  \" ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA)

  pp. 11-20

  Monterey

  CA

  Febuary 2014.

  Best Paper Award at FPL

  M. Gort

  J.H. Anderson

  \"Reducing FPGA router run-time through algorithm and architecture

  \" IEEE International Conference on Field Programmable Logic and Applications (FPL)

  pp. 336-342

  Crete

  Greece

  September 2011.

  Gordon R. Slemon Award for Excellence in the Teaching of Design

• 2014

  ACM Transactions on Design Automation of Electronic Systems (TODAES)

  Xilinx

  Inc.

  Director-level position leading a group working on the research

  design and implementation of placement

  routing

  timing

  synthesis tools for Xilinx FPGAs

  with emphasis on power reduction

  run-time

  performance and ease-of-use. Two years managing all place/route activities at Xilinx with a team of over 20 engineers. Based in San Jose

  CA

  USA (5 years) and Toronto

  Canada.

  Xilinx

  Inc.

  Asst. Professor

  Dept. of Electrical and Computer Engineering

  University of Toronto

  Member of the journal's editorial board with responsibility for programmable logic-related paper submissions. http://todaes.acm.org/

  ACM Transactions on Design Automation of Electronic Systems (TODAES)

  Adjunct Professor

  Instructor for graduate course on computer-aided design (CAD) for integrated circuits. The course is offered to master's and doctoral students and covers synthesis

  placement

  routing

  timing analysis and physical synthesis.

  Dept. of Electrical and Computer Engineering

  University of Toronto

• 2012

  Jason

  Anderson

  IEEE International Solid-State Circuits Conference (ISSCC)

  University of Toronto

  LegUp Computing Inc.

  Dept. of Electrical and Computer Engineering

  University of Toronto

  Handling Digital Systems and Digital Circuits

  IEEE International Solid-State Circuits Conference (ISSCC)

  University of Toronto

  Toronto

  Canada Area

  Tenured post with teaching and research responsibilities. Researching architectures

  circuits

  tools and applications for programmable platforms.\n\nInstructor for 'ECE1387 - CAD for Circuit Synthesis and Layout' (graduate)

  'APS105 - Computer Fundamentals' and 'ECE241 - Digital Systems' (undergraduate).

  Associate Professor and Jeffrey Skoll Endowed Chair

  Dept. of Electrical and Computer Engineering

  Launched in 2015 and headquartered in Toronto

  LegUp Computing Inc. is spawned from years of research in FPGA high-level synthesis and compute acceleration at the Department of Electrical and Computer Engineering

  University of Toronto. Custom computing acceleration solutions using field-programmable gate array (FPGA) hardware can bring orders of magnitude improvement in computational throughput and energy efficiency.\n\nhttp://www.legupcomputing.com\n

  Chief Scientific Advisor and Co-Founder

  Toronto

  Canada Area

  LegUp Computing Inc.

  Toronto

  Canada

  Full Professor researching architectures

  circuits

  design methodologies and applications of programmable digital systems

  such as field-programmable gate arrays (FPGAs)

  and coarse-grained reconfigurable arrays (CGRAs). Leading a dynamic group of terrific graduate students exploring interesting ideas in these areas. Holds the Jeffrey Skoll Endowed Chair in Software Engineering and serving as the department's Associate Chair (Research) for 2018-2021.\n\nInstructor for ECE241 Digital Systems and ECE1387 CAD for Digital Circuit Synthesis and Layout.\n\nhttp://janders.ca\n

  Professor and Associate Chair (Research)

  Dept. of Electrical and Computer Engineering

  University of Toronto

  Program Chair

  2017 ACM International Symposium on FPGAs

  Program Co-Chair

  2012 IEEE Int'l Conference on Field-Programmable Technology (FPT)

  General Chair

  2018 ACM International Symposium on FPGAs

  Program Co-Chair

  2016 Int'l Conference on Field-Programmable Logic and Applications (FPL)

  General Chair

  2018 International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART)

• 2001

  Glenlawn Collegiate

  High School

  Winnipeg

  MB

  Computer Engineering

  B.Sc.

  B.Sc. thesis on using artificial neural networks for speaker identification.

  Ph.D.

  Research area: Computer-aided design and circuit-level techniques for low-power field-programmable gate arrays.

  Electrical and Computer Engineering

  M.A.Sc.

  Electrical and Computer Engineering

  CAD for Circuit Synthesis

  Digital and Computer Systems

  Computer Fundamentals

  Digital Systems

  Professional Engineer (P.Eng.)

  Association of Professional Engineers of Ontario (APEO)

• International Solid-State Circuits Conference - January 31 - February 4

  2016 - San Francisco

  CA

  ISSCC is the flagship conference of the Solid-State Circuits Society and is the premier forum for presenting advances in solid-state circuits and systems-on-a-chip. The Conference offers a unique opportunity to network with leading experts in the field.

  International Solid-State Circuits Conference - January 31 - February 4

  2016 - San Francisco

  CA

  Simulations

  Low-power Design

  Computer Architecture

  Integrated Circuit Design

  Static Timing Analysis

  ASIC

  EDA

  FPGA

  High-level synthesis

  Computer Hardware

  IC

  CGRA-ME: Coarse-Grained Reconfigurable Array Modeling and Exploration

  Open-source framework for the modeling and exploration of CGRA architectures and CAD algorithms.

  Architectures

  circuits

  tools

  and applications for programmable computing platforms

  Pursuing innovative and interesting ideas in the design

  synthesis and use of digital systems.\n

  LegUp: High-level synthesis for FPGAs

  Anderson